The invention relates to a test method, a test device, as well as to a semiconductor device, in one embodiment a data buffer device, and to a memory module.
Semiconductor devices, e.g., corresponding, integrated (analog or digital) computing circuits, semiconductor memory devices such as, for instance, functional memory devices (PLAs, PALs, etc.) and table memory devices (e.g., ROMs or RAMs, in one embodiment SRAMs and DRAMs), etc. are subject to comprehensive tests during and after their manufacturing process.
For the common manufacturing of a plurality of (in general identical) semiconductor devices, a wafer (i.e. a thin disc of monocrystalline silicon) is used. The wafer is processed appropriately (e.g., subject successively to a plurality of coating, exposure, etching, diffusion, and implantation process, etc.), and subsequently sawn apart (or e.g., scratched, and broken), so that the individual devices are then available.
During the manufacturing of semiconductor devices (e.g., of DRAMs (Dynamic Random Access Memories or dynamic write-read memories)), in one embodiment of DDR-DRAMs (Double Data Rate-DRAMs)—even before all the desired, above-mentioned processing were performed on the wafer—(i.e. already in a semi-finished state of the semiconductor devices) the (semi-finished) devices (that are still available on the wafer) may be subject to appropriate test methods at one or a plurality of test stations by using one or a plurality of test devices (e.g., kerf measurements at the wafer kerf).
After the finishing of the semiconductor devices (i.e. after the performing of all the above-mentioned wafer processing), the semiconductor devices are subject to further test methods at one or a plurality of (further) test stations—for instance, by using appropriate (further) test devices, the finished devices—that are still available on the wafer—may be tested appropriately (so-called “wafer tests”).
Correspondingly, one or a plurality of further tests (at corresponding further test stations, and by using appropriate, further test devices) may be performed, for instance, after the incorporation of the semiconductor devices in the corresponding semiconductor device packages, and/or e.g., after the incorporation of the semiconductor device packages (along with the respectively included semiconductor devices) in corresponding electronic modules, e.g., memory modules (so-called “module tests”).
In a plurality of applications—e.g., in server or workstation computers, etc.—memory modules with upstream data buffer devices (so-called buffers) may be used, e.g., “buffered” or “registered” DIMMs, FB-DIMMs (FB-DIMM=Fully Buffered DIMM), etc.
Such memory modules include in general one or a plurality of semiconductor memory devices, in one embodiment DRAMs, and—upstream of the semiconductor memory devices—one or a plurality of data buffer devices (which may, for instance, be arranged on the same printed circuit board as the DRAMs).
The memory modules are in one embodiment by interconnecting an appropriate memory controller (which is, for instance, positioned externally of the respective memory module)—connected with one or a plurality of microprocessors of the respective server or workstation computer, etc.
Caused by the upstream arrangement of the data buffer devices (buffers), it is possible to perform the above-mentioned conventional module tests only in a very restricted scope in the above-mentioned “registered” DIMMs, FB-DIMMs, etc. One reason for this is that the signals exchanged between a respective buffer and the DRAMs are not accessible from outside. Therefore, the quality of the connections between the buffer and the DRAMs can, for instance, only be tested indirectly by using conventional test methods.
For these and other reasons, there is a need for the present invention.